The BMA423 is a small accelerometer by Bosch. The data sheet is here. It is 129 pages. It is really crap if you want to just use this chip. It repeats itself quite a bit as well. The Quick Start Guide has a nice vague bit about writing the init file as a burst write to address 0x5E.

There is reference code, and the help forums for this just have Bosch saying to use the reference code. Some of us would rather not. A good data sheet should not expect you to just use the reference code. It is also a bugger to follow.

One of the main issues is the the reference code works with registers 0x5B and 0x5D which the data sheet lists as reserved. This is silly, the data sheet could define these. The reference code also has 6kiB of binary code that seems to need to be sent.

So, here is what I worked out, and it is now working.


Reading and writing registers is standard I2C register read write. I.e. write the register address and then data, or write the register address and then read data, allowing multiple byte writes or reads as normal (with on exception, see below).


  • You can check all is well, and init done, by reading 0x2A (INTERNAL_STATUS), and confirming it is 0x01

Soft reboot

  • You can do a full soft boot by writing 0xB6 to 0x7E (CMD).
  • Wait 1s after soft boot

Loading ASIC code

  • Write 0x00 to 0x7C (PWR_CONF). This disables aps (advanced power save).
  • Wait 500ms
  • Write 0x00 to 0x59 (INIT_CTRL)
  • Send the 6k block to the ASIC address 0 (see below) - see here for the data.
  • Write 0x01 to 0x59 (INIT_CTRL)
  • Wait 150ms
  • Check status by reading 0x2A (INTERNAL_STATUS), it should now be 0x01
  • Read the ASIC address at 0x5B/0x5C, this is where you load FEATURES_IN (see below)
  • Write 0x01 to 0x7C (PWR_CONF). This re-enables aps

Block read/write to ASIC

It seems there is a separate ASIC block of memory, and this is accessed by three registers.

  • 0x5B is low byte of address to next read/write - BUT NOT AS SIMPLS AS THAT!
  • 0x5C is high byte of address to next read/write
  • 0x5E is the gateway to reading and writing

Normally, with I2C it would auto increment the register on read/write when transferring multiple bytes. This does not happen with 0x5E. You can write to 0x5B/0x5C as a 2 byte transfer, as per normal I2C.

The ASIC address is stored oddly. It has to be even (bit 0=0) and you have to read/write even number of bytes at a time via 0x5E. The address is stored such that 0x5B is (address>>1)&0xF, i.e. bits 1-4 of address. 0x5C is address>>5 (i.e. bits 5-12). So you need to allow for this when reading or writing the ASIC address.

It seems from reference code you can transfer up to a maximum of 8 bytes at a time, so you have to repeatedly write the ASIC address to 0x5B/0x5C then write 8 bytes to 0x5E in one block. However, my testing suggests you can transfer the whole 6kiB init in one go, so totally pointless reference code.

Once the init file is written, and the status is 0x01, you have to read the address in 0x5B/0x5C which tells you where the FEATURES_IN block is located in ASIC memory... Shift it appropriately to get the byte ASIC address.


FEATURES_IN is block of 64 bytes in ASIC memory. You can read/write even number of bytes, setting 0x5B/0x5C to the base address (as read above) plus the offset in to the block. The data sheet does list these additional registers reasonably well. It just lacks any explanation of how you access these bits!

You can read all 64 bytes in one go, and write all 64 in one go, or read/write even numbers of bytes if you only need to change one register.


To enable step counting, I have done the following :-

  • Write 0x00 to 0x41 (ACC_RANGE) to set ±2G
  • Write 0x02 to 0x56 (INT1_MAP) - only needed if you want interrupts
  • Write 0x04 to 0x7D (PWR_CTRL) to enable accelerometer
  • Set FEATURES_IN(0x37) OR'd 0x30 to enable activity and counter
  • Set FEATURES_IN(0x3B) OR'd 0x10 - not idea what this does as reserved in data sheet! 

Reading steps is then 4 bytes from 0x1E onwards, low to high bytes for 32 bits.

Resetting the step counter is setting FEATURES_IN(0x47) OR'd 0x04 (self clearing).

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